Oxide-semiconductor interfaces have a wide application in many aspects of the semiconductor industry. Recently, the demand has also grown for III-V semiconductors in high volume applications such as wireless and fiber optic communications. This has sparked increased interest in III-V based metal-oxide semiconductor (MOS) field effect transistors (FET). This increased demand has in turn focused research on surmounting previous technical limitations and manufacturing difficulties encountered with III-V MOSFET applications.
The requirements for gate quality oxide-semiconductor interfaces are numerous. In one aspect of semiconductor manufacture, there are competing demands. It is desired to “passivate” the interface between an oxide and a semiconductor. However, it is simultaneously desired that the passivation step not unduly affect the trap density at a given trap energy in the final product. Thus it is desired to develop manufacturing methods for oxide/III-V semiconductor structures that simultaneously achieve an effective interface passivation while reducing or maintaining oxide trap density levels.
Previously, gallium based MOS structures have encountered technical limitations due to high trap density. Trap density has been so high that in MOSFET applications the semiconductor could not function. Thus it would be desired to find a method of treating III-V type MOS structures so as to reduce both interface and oxide trap density.
In prior art thermal silicon dioxide MOS structures with silicon as the semiconductor substrate, oxide-semiconductor interface passivation is achieved using an atmosphere infused with dry hydrogen (H2) or hydrogen's isotope, deuterium. Prior art further describes effective passivation of Ga2O3/GaAs interfaces using dry hydrogen or deuterium generated by a plasma (U.S. Pat. No. 6,025,281). However, it has been learned that dry hydrogen or deuterium do not function well with Ga2O3 based dielectric stacks on III-V semiconductors. For example, oxide-semiconductor structures that use GdGaO/Ga2O3 dielectric stacks on GaAs are not well treated by prior art methods. Although a dry hydrogen passivation of such materials efficiently reduces the Ga2O3/GaAs interface trap density, such prior art technique damages the oxide and increases the oxide trap density resulting in a substantial increase of the total trap density, thus rendering the materials unsuitable. Thus, it is also desired to discover new materials for passivation operations.
Hence there is a need to develop a new passivation method that yields improved results and is relatively inexpensive to use. It would be desired to develop a new passivation method that is directed to gate dielectric stacks on III-V semiconductors comprising gallium oxide, gallate layers and/or combinations thereof. It would be further desired to develop a new passivation method that is directed to gate dielectric stacks on III-V semiconductors which reduces the trap density at the oxide/III-V semiconductor interface while reducing or maintaining the oxide trap density. It would further be advantageous if the new passivation method employed existing processing hardware and equipment that is used in semiconductor manufacturing processes. The present invention addresses one or more of these needs.